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olimex-uex
38 changed files with 185980 additions and 63 deletions
3
.gitignore
vendored
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.gitignore
vendored
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*.bak
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backups
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*-backups
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289
LICENSE.txt
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289
LICENSE.txt
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CERN Open Hardware Licence Version 2 - Strongly Reciprocal
|
||||||
|
|
||||||
|
|
||||||
|
Preamble
|
||||||
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|
||||||
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CERN has developed this licence to promote collaboration among
|
||||||
|
hardware designers and to provide a legal tool which supports the
|
||||||
|
freedom to use, study, modify, share and distribute hardware designs
|
||||||
|
and products based on those designs. Version 2 of the CERN Open
|
||||||
|
Hardware Licence comes in three variants: CERN-OHL-P (permissive); and
|
||||||
|
two reciprocal licences: CERN-OHL-W (weakly reciprocal) and this
|
||||||
|
licence, CERN-OHL-S (strongly reciprocal).
|
||||||
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|
||||||
|
The CERN-OHL-S is copyright CERN 2020. Anyone is welcome to use it, in
|
||||||
|
unmodified form only.
|
||||||
|
|
||||||
|
Use of this Licence does not imply any endorsement by CERN of any
|
||||||
|
Licensor or their designs nor does it imply any involvement by CERN in
|
||||||
|
their development.
|
||||||
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|
||||||
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|
||||||
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1 Definitions
|
||||||
|
|
||||||
|
1.1 'Licence' means this CERN-OHL-S.
|
||||||
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|
||||||
|
1.2 'Compatible Licence' means
|
||||||
|
|
||||||
|
a) any earlier version of the CERN Open Hardware licence, or
|
||||||
|
|
||||||
|
b) any version of the CERN-OHL-S, or
|
||||||
|
|
||||||
|
c) any licence which permits You to treat the Source to which
|
||||||
|
it applies as licensed under CERN-OHL-S provided that on
|
||||||
|
Conveyance of any such Source, or any associated Product You
|
||||||
|
treat the Source in question as being licensed under
|
||||||
|
CERN-OHL-S.
|
||||||
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|
||||||
|
1.3 'Source' means information such as design materials or digital
|
||||||
|
code which can be applied to Make or test a Product or to
|
||||||
|
prepare a Product for use, Conveyance or sale, regardless of its
|
||||||
|
medium or how it is expressed. It may include Notices.
|
||||||
|
|
||||||
|
1.4 'Covered Source' means Source that is explicitly made available
|
||||||
|
under this Licence.
|
||||||
|
|
||||||
|
1.5 'Product' means any device, component, work or physical object,
|
||||||
|
whether in finished or intermediate form, arising from the use,
|
||||||
|
application or processing of Covered Source.
|
||||||
|
|
||||||
|
1.6 'Make' means to create or configure something, whether by
|
||||||
|
manufacture, assembly, compiling, loading or applying Covered
|
||||||
|
Source or another Product or otherwise.
|
||||||
|
|
||||||
|
1.7 'Available Component' means any part, sub-assembly, library or
|
||||||
|
code which:
|
||||||
|
|
||||||
|
a) is licensed to You as Complete Source under a Compatible
|
||||||
|
Licence; or
|
||||||
|
|
||||||
|
b) is available, at the time a Product or the Source containing
|
||||||
|
it is first Conveyed, to You and any other prospective
|
||||||
|
licensees
|
||||||
|
|
||||||
|
i) as a physical part with sufficient rights and
|
||||||
|
information (including any configuration and
|
||||||
|
programming files and information about its
|
||||||
|
characteristics and interfaces) to enable it either to
|
||||||
|
be Made itself, or to be sourced and used to Make the
|
||||||
|
Product; or
|
||||||
|
ii) as part of the normal distribution of a tool used to
|
||||||
|
design or Make the Product.
|
||||||
|
|
||||||
|
1.8 'Complete Source' means the set of all Source necessary to Make
|
||||||
|
a Product, in the preferred form for making modifications,
|
||||||
|
including necessary installation and interfacing information
|
||||||
|
both for the Product, and for any included Available Components.
|
||||||
|
If the format is proprietary, it must also be made available in
|
||||||
|
a format (if the proprietary tool can create it) which is
|
||||||
|
viewable with a tool available to potential licensees and
|
||||||
|
licensed under a licence approved by the Free Software
|
||||||
|
Foundation or the Open Source Initiative. Complete Source need
|
||||||
|
not include the Source of any Available Component, provided that
|
||||||
|
You include in the Complete Source sufficient information to
|
||||||
|
enable a recipient to Make or source and use the Available
|
||||||
|
Component to Make the Product.
|
||||||
|
|
||||||
|
1.9 'Source Location' means a location where a Licensor has placed
|
||||||
|
Covered Source, and which that Licensor reasonably believes will
|
||||||
|
remain easily accessible for at least three years for anyone to
|
||||||
|
obtain a digital copy.
|
||||||
|
|
||||||
|
1.10 'Notice' means copyright, acknowledgement and trademark notices,
|
||||||
|
Source Location references, modification notices (subsection
|
||||||
|
3.3(b)) and all notices that refer to this Licence and to the
|
||||||
|
disclaimer of warranties that are included in the Covered
|
||||||
|
Source.
|
||||||
|
|
||||||
|
1.11 'Licensee' or 'You' means any person exercising rights under
|
||||||
|
this Licence.
|
||||||
|
|
||||||
|
1.12 'Licensor' means a natural or legal person who creates or
|
||||||
|
modifies Covered Source. A person may be a Licensee and a
|
||||||
|
Licensor at the same time.
|
||||||
|
|
||||||
|
1.13 'Convey' means to communicate to the public or distribute.
|
||||||
|
|
||||||
|
|
||||||
|
2 Applicability
|
||||||
|
|
||||||
|
2.1 This Licence governs the use, copying, modification, Conveying
|
||||||
|
of Covered Source and Products, and the Making of Products. By
|
||||||
|
exercising any right granted under this Licence, You irrevocably
|
||||||
|
accept these terms and conditions.
|
||||||
|
|
||||||
|
2.2 This Licence is granted by the Licensor directly to You, and
|
||||||
|
shall apply worldwide and without limitation in time.
|
||||||
|
|
||||||
|
2.3 You shall not attempt to restrict by contract or otherwise the
|
||||||
|
rights granted under this Licence to other Licensees.
|
||||||
|
|
||||||
|
2.4 This Licence is not intended to restrict fair use, fair dealing,
|
||||||
|
or any other similar right.
|
||||||
|
|
||||||
|
|
||||||
|
3 Copying, Modifying and Conveying Covered Source
|
||||||
|
|
||||||
|
3.1 You may copy and Convey verbatim copies of Covered Source, in
|
||||||
|
any medium, provided You retain all Notices.
|
||||||
|
|
||||||
|
3.2 You may modify Covered Source, other than Notices, provided that
|
||||||
|
You irrevocably undertake to make that modified Covered Source
|
||||||
|
available from a Source Location should You Convey a Product in
|
||||||
|
circumstances where the recipient does not otherwise receive a
|
||||||
|
copy of the modified Covered Source. In each case subsection 3.3
|
||||||
|
shall apply.
|
||||||
|
|
||||||
|
You may only delete Notices if they are no longer applicable to
|
||||||
|
the corresponding Covered Source as modified by You and You may
|
||||||
|
add additional Notices applicable to Your modifications.
|
||||||
|
Including Covered Source in a larger work is modifying the
|
||||||
|
Covered Source, and the larger work becomes modified Covered
|
||||||
|
Source.
|
||||||
|
|
||||||
|
3.3 You may Convey modified Covered Source (with the effect that You
|
||||||
|
shall also become a Licensor) provided that You:
|
||||||
|
|
||||||
|
a) retain Notices as required in subsection 3.2;
|
||||||
|
|
||||||
|
b) add a Notice to the modified Covered Source stating that You
|
||||||
|
have modified it, with the date and brief description of how
|
||||||
|
You have modified it;
|
||||||
|
|
||||||
|
c) add a Source Location Notice for the modified Covered Source
|
||||||
|
if You Convey in circumstances where the recipient does not
|
||||||
|
otherwise receive a copy of the modified Covered Source; and
|
||||||
|
|
||||||
|
d) license the modified Covered Source under the terms and
|
||||||
|
conditions of this Licence (or, as set out in subsection
|
||||||
|
8.3, a later version, if permitted by the licence of the
|
||||||
|
original Covered Source). Such modified Covered Source must
|
||||||
|
be licensed as a whole, but excluding Available Components
|
||||||
|
contained in it, which remain licensed under their own
|
||||||
|
applicable licences.
|
||||||
|
|
||||||
|
|
||||||
|
4 Making and Conveying Products
|
||||||
|
|
||||||
|
You may Make Products, and/or Convey them, provided that You either
|
||||||
|
provide each recipient with a copy of the Complete Source or ensure
|
||||||
|
that each recipient is notified of the Source Location of the Complete
|
||||||
|
Source. That Complete Source is Covered Source, and You must
|
||||||
|
accordingly satisfy Your obligations set out in subsection 3.3. If
|
||||||
|
specified in a Notice, the Product must visibly and securely display
|
||||||
|
the Source Location on it or its packaging or documentation in the
|
||||||
|
manner specified in that Notice.
|
||||||
|
|
||||||
|
|
||||||
|
5 Research and Development
|
||||||
|
|
||||||
|
You may Convey Covered Source, modified Covered Source or Products to
|
||||||
|
a legal entity carrying out development, testing or quality assurance
|
||||||
|
work on Your behalf provided that the work is performed on terms which
|
||||||
|
prevent the entity from both using the Source or Products for its own
|
||||||
|
internal purposes and Conveying the Source or Products or any
|
||||||
|
modifications to them to any person other than You. Any modifications
|
||||||
|
made by the entity shall be deemed to be made by You pursuant to
|
||||||
|
subsection 3.2.
|
||||||
|
|
||||||
|
|
||||||
|
6 DISCLAIMER AND LIABILITY
|
||||||
|
|
||||||
|
6.1 DISCLAIMER OF WARRANTY -- The Covered Source and any Products
|
||||||
|
are provided 'as is' and any express or implied warranties,
|
||||||
|
including, but not limited to, implied warranties of
|
||||||
|
merchantability, of satisfactory quality, non-infringement of
|
||||||
|
third party rights, and fitness for a particular purpose or use
|
||||||
|
are disclaimed in respect of any Source or Product to the
|
||||||
|
maximum extent permitted by law. The Licensor makes no
|
||||||
|
representation that any Source or Product does not or will not
|
||||||
|
infringe any patent, copyright, trade secret or other
|
||||||
|
proprietary right. The entire risk as to the use, quality, and
|
||||||
|
performance of any Source or Product shall be with You and not
|
||||||
|
the Licensor. This disclaimer of warranty is an essential part
|
||||||
|
of this Licence and a condition for the grant of any rights
|
||||||
|
granted under this Licence.
|
||||||
|
|
||||||
|
6.2 EXCLUSION AND LIMITATION OF LIABILITY -- The Licensor shall, to
|
||||||
|
the maximum extent permitted by law, have no liability for
|
||||||
|
direct, indirect, special, incidental, consequential, exemplary,
|
||||||
|
punitive or other damages of any character including, without
|
||||||
|
limitation, procurement of substitute goods or services, loss of
|
||||||
|
use, data or profits, or business interruption, however caused
|
||||||
|
and on any theory of contract, warranty, tort (including
|
||||||
|
negligence), product liability or otherwise, arising in any way
|
||||||
|
in relation to the Covered Source, modified Covered Source
|
||||||
|
and/or the Making or Conveyance of a Product, even if advised of
|
||||||
|
the possibility of such damages, and You shall hold the
|
||||||
|
Licensor(s) free and harmless from any liability, costs,
|
||||||
|
damages, fees and expenses, including claims by third parties,
|
||||||
|
in relation to such use.
|
||||||
|
|
||||||
|
|
||||||
|
7 Patents
|
||||||
|
|
||||||
|
7.1 Subject to the terms and conditions of this Licence, each
|
||||||
|
Licensor hereby grants to You a perpetual, worldwide,
|
||||||
|
non-exclusive, no-charge, royalty-free, irrevocable (except as
|
||||||
|
stated in subsections 7.2 and 8.4) patent licence to Make, have
|
||||||
|
Made, use, offer to sell, sell, import, and otherwise transfer
|
||||||
|
the Covered Source and Products, where such licence applies only
|
||||||
|
to those patent claims licensable by such Licensor that are
|
||||||
|
necessarily infringed by exercising rights under the Covered
|
||||||
|
Source as Conveyed by that Licensor.
|
||||||
|
|
||||||
|
7.2 If You institute patent litigation against any entity (including
|
||||||
|
a cross-claim or counterclaim in a lawsuit) alleging that the
|
||||||
|
Covered Source or a Product constitutes direct or contributory
|
||||||
|
patent infringement, or You seek any declaration that a patent
|
||||||
|
licensed to You under this Licence is invalid or unenforceable
|
||||||
|
then any rights granted to You under this Licence shall
|
||||||
|
terminate as of the date such process is initiated.
|
||||||
|
|
||||||
|
|
||||||
|
8 General
|
||||||
|
|
||||||
|
8.1 If any provisions of this Licence are or subsequently become
|
||||||
|
invalid or unenforceable for any reason, the remaining
|
||||||
|
provisions shall remain effective.
|
||||||
|
|
||||||
|
8.2 You shall not use any of the name (including acronyms and
|
||||||
|
abbreviations), image, or logo by which the Licensor or CERN is
|
||||||
|
known, except where needed to comply with section 3, or where
|
||||||
|
the use is otherwise allowed by law. Any such permitted use
|
||||||
|
shall be factual and shall not be made so as to suggest any kind
|
||||||
|
of endorsement or implication of involvement by the Licensor or
|
||||||
|
its personnel.
|
||||||
|
|
||||||
|
8.3 CERN may publish updated versions and variants of this Licence
|
||||||
|
which it considers to be in the spirit of this version, but may
|
||||||
|
differ in detail to address new problems or concerns. New
|
||||||
|
versions will be published with a unique version number and a
|
||||||
|
variant identifier specifying the variant. If the Licensor has
|
||||||
|
specified that a given variant applies to the Covered Source
|
||||||
|
without specifying a version, You may treat that Covered Source
|
||||||
|
as being released under any version of the CERN-OHL with that
|
||||||
|
variant. If no variant is specified, the Covered Source shall be
|
||||||
|
treated as being released under CERN-OHL-S. The Licensor may
|
||||||
|
also specify that the Covered Source is subject to a specific
|
||||||
|
version of the CERN-OHL or any later version in which case You
|
||||||
|
may apply this or any later version of CERN-OHL with the same
|
||||||
|
variant identifier published by CERN.
|
||||||
|
|
||||||
|
8.4 This Licence shall terminate with immediate effect if You fail
|
||||||
|
to comply with any of its terms and conditions.
|
||||||
|
|
||||||
|
8.5 However, if You cease all breaches of this Licence, then Your
|
||||||
|
Licence from any Licensor is reinstated unless such Licensor has
|
||||||
|
terminated this Licence by giving You, while You remain in
|
||||||
|
breach, a notice specifying the breach and requiring You to cure
|
||||||
|
it within 30 days, and You have failed to come into compliance
|
||||||
|
in all material respects by the end of the 30 day period. Should
|
||||||
|
You repeat the breach after receipt of a cure notice and
|
||||||
|
subsequent reinstatement, this Licence will terminate
|
||||||
|
immediately and permanently. Section 6 shall continue to apply
|
||||||
|
after any termination.
|
||||||
|
|
||||||
|
8.6 This Licence shall not be enforceable except by a Licensor
|
||||||
|
acting as such, and third party beneficiary rights are
|
||||||
|
specifically excluded.
|
||||||
BIN
Parts List.ods
Normal file
BIN
Parts List.ods
Normal file
Binary file not shown.
189
README.md
189
README.md
|
|
@ -1,72 +1,160 @@
|
||||||
# mUART Failsafe Interposer
|
# Olimex UEXT Failsafe Interposer for mUART
|
||||||
|
|
||||||
<a href="https://opensource.org"><img height="150px" align="left" src="https://opensource.org/files/OSIApprovedCropped.png" alt="Open Source Initiative Approved License logo"></a>
|
<a href="https://opensource.org"><img height="150" align="left" src="https://opensource.org/files/OSIApprovedCropped.png" alt="Open Source Initiative Approved License logo"></a>
|
||||||
|
[](https://spdx.org/licenses/CERN-OHL-S-2.0.html)
|
||||||
|
|
||||||
This repository contains firmware and hardware designs for PCBs that
|
This repository contains the hardware design for a PCB that
|
||||||
can be used with the [mUART](https://muart-group.github.io/)
|
can be used with the [mUART](https://muart-group.github.io/)
|
||||||
components in [ESPHome](https://esphome.io/). The PCBs provide
|
components in [ESPHome](https://esphome.io/). The PCB provides
|
||||||
interfaces for the UART links to the heat pump/air handler and
|
interfaces for the UART links to the heat pump/air handler and
|
||||||
thermostat (using CN105-style connectors), and implement a 'failsafe'
|
thermostat (using CN105-style connectors), and implements a 'failsafe'
|
||||||
mode ensuring that the HP/AH and the thermostat can communicate with
|
mode ensuring that the HP/AH and the thermostat can communicate with
|
||||||
each other even if the ESPHome 'host' is not operating properly (or
|
each other even if the ESPHome 'host' is not operating properly (or
|
||||||
not connected at all). They are designed to be interposed between the
|
not connected at all).
|
||||||
heat pump/air handler and the thermostat.
|
|
||||||
|
|
||||||
##
|
##
|
||||||
|
|
||||||
## Design
|
<a href="./olimex-uext-front-2024.5.png"><img height="400px" width="660px" src="olimex-uext-front-2024.5.png" alt="Ray-traced 3D rendering of the front side of the adapter board"></a>
|
||||||
|
<a href="./olimex-uext-back-2024.5.png"><img height="400px" width="660px" src="olimex-uext-back-2024.5.png" alt="Ray-traced 3D rendering of the back side of the adapter board"></a>
|
||||||
|
|
||||||
The 'failsafe' feature is implemented by using four analog multiplexer
|
This board is designed to be used with an
|
||||||
chips (each chip can route either of two signals to its
|
[Olimex](https://www.olimex.com/Products/IoT/) ESP32-based host board
|
||||||
input/output). These are used to either connect the UART TX/RX signals
|
that has a [UEXT](https://www.olimex.com/Products/Modules/)
|
||||||
between the HP/AH and thermostat (the 'bypass' mode), or to connect
|
connector. However, since the host connections are standard header
|
||||||
them to the GPIOs on the ESPHome device (the 'host' mode, so that the
|
pins, it can be used with any ESP32-based board by using jumper wires.
|
||||||
mUART software can communicate with the HP/AH and thermostat). At
|
|
||||||
power-up, two of the multiplexers connect the UART signals in 'bypass'
|
|
||||||
mode and the other two multiplexers are disabled.
|
|
||||||
|
|
||||||
In addition to the multiplexers there is an
|
The board contains CN105-style connectors, the analog multiplexers and
|
||||||
[MSP430](https://www.ti.com/microcontrollers-mcus-processors/msp430-microcontrollers/overview.html)
|
MSP430, 3.3V-to-5V level shifters, and various status LEDs.
|
||||||
microcontroller running a very small program (see Firmware below). The
|
|
||||||
MSP430 can switch the multiplexers into 'host' mode or allow them to
|
|
||||||
fall back to 'bypass' mode, depending on whether it receives periodic
|
|
||||||
'alive' signals (pulses on a GPIO) from the ESPHome device. By default
|
|
||||||
it requires the ESPHome device to send at least one pulse every four
|
|
||||||
seconds; if no pulse is received during a four-second period, the
|
|
||||||
multiplexers will switch back to 'bypass' mode. As long as the ESPHome
|
|
||||||
device's software is operating correctly and sending periodic pulses,
|
|
||||||
it will be able to communicate with the HP/AH and the thermostat. This
|
|
||||||
also means that the ESPHome device must send an initial pulse when it
|
|
||||||
starts up in order to switch the multiplexers into 'host' mode; the
|
|
||||||
example configuration below shows one way to do that.
|
|
||||||
|
|
||||||
## Firmware
|
## Power Supplies
|
||||||
|
|
||||||
The [firmware](../firmware) is a C program which runs on the
|
The 5V portion of the board includes the analog multiplexers (which
|
||||||
MSP430. It can be used with any variant of the MSP430 low-cost
|
handle 5V UART signals), the upper indicator LEDs, and one side of
|
||||||
mixed-signal MCUs (FR2000, FR2100, FR2110, or FR2111) with no code
|
each of the level shifters. This portion of the board obtains power
|
||||||
changes.
|
from the +5V pin on the `HEAT PUMP` connector.
|
||||||
|
|
||||||
## Hardware
|
The 3.3V portion of the board includes the MCU, the lower indicator
|
||||||
|
LEDs, and one side of each of the level shifters. This portion of the
|
||||||
|
board obtains power from the +3V3 pin on the `UEXT` connector.
|
||||||
|
|
||||||
### Olimex UEXT Adapter
|
**NOTE** These power supplies are NOT isolated; they share a ground
|
||||||
|
(GND) connection, and as a result the device connected to the host
|
||||||
|
connection must be powered using a galvanically-isolated power supply
|
||||||
|
if it is not powered from the `HEAT PUMP` connector. If desired, a
|
||||||
|
header pin can be installed into the J3 position on the board to
|
||||||
|
provide access to the +12V connection, so that it can be used to power
|
||||||
|
the host device. It is not recommended to power the host device from
|
||||||
|
the +5V connection on the `HEAT PUMP` connector.
|
||||||
|
|
||||||
<img height="250px" width="410px" src="../olimex-uext/olimex-uext-front-2024.5.png" alt="Ray-traced 3D rendering of the front side of the adapter board"><img height="250px" width="410px" src="../olimex-uext/olimex-uext-back-2024.5.png" alt="Ray-traced 3D rendering of the back side of the adapter board">
|
## Host Connection
|
||||||
|
|
||||||
The [Olimex UEXT Adapter board](../olimex-uext) is designed to
|
The host connection is a 10-pin
|
||||||
be used with an [Olimex](https://www.olimex.com/Products/IoT/)
|
[IDC](https://en.wikipedia.org/wiki/IDC_(electrical_connector))-style
|
||||||
ESP32-based host board that has a
|
pin header receptacle, as is commonly used by Olimex on their UEXT
|
||||||
[UEXT](https://www.olimex.com/Products/Modules/) connector. However,
|
modules. The pins are 0.64mm/.025in square, which means they can be
|
||||||
since the host connections are standard header pins, it can be used
|
used with commonly available 'Dupont' jumper wires to connect to an
|
||||||
with any ESP32-based board by using jumper wires.
|
ESP host board (or breadboard) if a 10-pin ribbon cable is not used.
|
||||||
|
|
||||||
The board contains the above-mentioned CN105-style connectors, the
|
### Pinout
|
||||||
analog multiplexers and MSP430, 3.3V-to-5V level shifters, and various
|
|
||||||
status LEDs.
|
|
||||||
|
|
||||||
## ESPHome Example Configuration
|
|Pin|Purpose|
|
||||||
|
|---|-------|
|
||||||
|
|1|+3V3 (from host)|
|
||||||
|
|2|GND (from host)|
|
||||||
|
|3|HP/AH transmit (from host)|
|
||||||
|
|4|HP/AH receive (to host)|
|
||||||
|
|5|TH transmit (from host)|
|
||||||
|
|6|TH receive (to host)|
|
||||||
|
|7|HOST_ACTIVE (from host, active low)|
|
||||||
|
|8|not used|
|
||||||
|
|9|not used|
|
||||||
|
|10|not used|
|
||||||
|
|
||||||
(coming soon)
|
## Heat Pump/Air Handler Connection
|
||||||
|
|
||||||
|
The `HEAT PUMP` connector should be connected to CN105 on the HP/AH
|
||||||
|
control board using a 5-conductor straight-through cable with JST PA
|
||||||
|
socket plugs.
|
||||||
|
|
||||||
|
Alternatively, pin headers can be installed into the J3 position to
|
||||||
|
allow Dupont-style jumper wires to be used for the connection. This
|
||||||
|
may also be useful for attaching a logic analyzer or other tool to
|
||||||
|
monitor the signals to/from the HP/AH.
|
||||||
|
|
||||||
|
## Thermostat Connection
|
||||||
|
|
||||||
|
The `THERMOSTAT` connector should be connected to the RedLink receiver
|
||||||
|
(for MHK2 thermostats) using the receiver's existing cable.
|
||||||
|
|
||||||
|
Alternatively, pin headers can be installed into the J2 position to
|
||||||
|
allow Dupont-style jumper wires to be used for the connection. This
|
||||||
|
may also be useful for attaching a logic analyzer or other tool to
|
||||||
|
monitor the signals to/from the TH.
|
||||||
|
|
||||||
|
## Indicator LEDs
|
||||||
|
|
||||||
|
### Upper
|
||||||
|
|
||||||
|
The upper LEDs are located just below the center mounting hole. There
|
||||||
|
is a red LED which will light when 5V power is supplied by the `HEAT
|
||||||
|
PUMP` connection, and a green LED which will light when the host has
|
||||||
|
control of the UART signals. Because the LEDs are located in the same
|
||||||
|
package, if both are lit the resulting color will be orange. This is
|
||||||
|
the desired result, since it means that the HP/AH is supplying power
|
||||||
|
and that the host is maintaining control of the UART signals.
|
||||||
|
|
||||||
|
**NOTE** The 5V power LED will light if 3V3 power is supplied without
|
||||||
|
5V power also being supplied; it will not light to full brightness in
|
||||||
|
that situation.
|
||||||
|
|
||||||
|
### Lower
|
||||||
|
|
||||||
|
The lower LEDs are located near the lower-right mounting hole. There
|
||||||
|
is a red LED which will light when +3V3 power is supplied by the
|
||||||
|
`UEXT` connection, and a green LED which will light when the host
|
||||||
|
sends an 'active' pulse. Because the LEDs are located in the same
|
||||||
|
package, if both are lit the resulting color will be orange. This is
|
||||||
|
the desired result, as it means that the host is supplying power and
|
||||||
|
sending 'active' signals (the LED package will light red most of the
|
||||||
|
time, with periodic orange pulses).
|
||||||
|
|
||||||
|
## Debugging/Programming
|
||||||
|
|
||||||
|
The MSP430 can be programmed using the `DEBUG-PGM` (J5) pads near the
|
||||||
|
lower-right mounting hole. These pads are labeled on the back of the
|
||||||
|
board, and carry +3V3 power, ground, and the data/clock signals for
|
||||||
|
the TI [Spy-By-Wire](https://en.wikipedia.org/wiki/Spy-Bi-Wire)
|
||||||
|
connection. Any TI MSP-FET or FET-compatible interface, including
|
||||||
|
those on the LaunchPad Development Kit boards, can be used for this
|
||||||
|
connection.
|
||||||
|
|
||||||
|
This connection can also be used for live debugging of the firmware
|
||||||
|
using `mspdebug` or other MSP430-compatible debugging software.
|
||||||
|
|
||||||
|
These pads are designed for a 4-pin 2.54mm-spacing pin header strip,
|
||||||
|
but can also be used with a programming clip containing spring-loaded
|
||||||
|
('pogo') pins.
|
||||||
|
|
||||||
|
## Manufacturing (JLCPCB)
|
||||||
|
|
||||||
|
The design files have been pre-configured for manufacturing by
|
||||||
|
[JLCPCB](https://jlcpcb.com/), and include all of the part numbers
|
||||||
|
needed for PCB assembly as well. These part numbers are also present
|
||||||
|
in the [Parts List](Parts List.ods) spreadsheet.
|
||||||
|
|
||||||
|
The *Fabrication Toolkit* plugin for KiCAD is used to generate all of
|
||||||
|
the files needed by JLCPCB, which are located in the
|
||||||
|
[production](production) directory, and include:
|
||||||
|
|
||||||
|
* [Gerber Files](production/Olimex_UEXT_Adapter_for_MUART_Failsafe_2024.5.zip)
|
||||||
|
* [BOM (Bill of Materials)](production/bom.csv)
|
||||||
|
* [CPL (Component Placement List)](production/positions.csv)
|
||||||
|
|
||||||
|
The schematic file includes `JLCPCB Rotation Offset` and `JLCPCB
|
||||||
|
Position Offset` fields which correct for mismatches between the KiCAD
|
||||||
|
manufacturing data and JLCPCB's manufacturing data; if any of the
|
||||||
|
pre-selected components are replaced with alternatives, these fields
|
||||||
|
may need to be changed in order to produce a correct CPL.
|
||||||
|
|
||||||
## Credits
|
## Credits
|
||||||
|
|
||||||
|
|
@ -80,6 +168,3 @@ please do not be offended :-)
|
||||||
|
|
||||||
* [Fabrication Toolkit](https://github.com/bennymeg/Fabrication-Toolkit)
|
* [Fabrication Toolkit](https://github.com/bennymeg/Fabrication-Toolkit)
|
||||||
* [KiCAD](https://www.kicad.org/)
|
* [KiCAD](https://www.kicad.org/)
|
||||||
* [MSP430 GCC](https://www.ti.com/tool/MSP430-GCC-OPENSOURCE)
|
|
||||||
* [mspdebug](https://github.com/dlbeer/mspdebug)
|
|
||||||
* [opensource-toolchain-msp430](https://github.com/cjacker/opensource-toolchain-msp430)
|
|
||||||
|
|
|
||||||
BIN
Test Plan.ods
Normal file
BIN
Test Plan.ods
Normal file
Binary file not shown.
BIN
Test Plan.pdf
Normal file
BIN
Test Plan.pdf
Normal file
Binary file not shown.
1
fabrication-toolkit-options.json
Normal file
1
fabrication-toolkit-options.json
Normal file
|
|
@ -0,0 +1 @@
|
||||||
|
{"EXTRA_LAYERS": "", "EXTEND_EDGE_CUT": false, "AUTO TRANSLATE": true, "AUTO FILL": true, "EXCLUDE DNP": true}
|
||||||
96664
fp-info-cache
Normal file
96664
fp-info-cache
Normal file
File diff suppressed because it is too large
Load diff
8
fp-lib-table
Normal file
8
fp-lib-table
Normal file
|
|
@ -0,0 +1,8 @@
|
||||||
|
(fp_lib_table
|
||||||
|
(version 7)
|
||||||
|
(lib (name "MSP430FR2000IRLLR")(type "KiCad")(uri "${KIPRJMOD}/libraries/MSP430FR2000IRLLR.pretty")(options "")(descr ""))
|
||||||
|
(lib (name "MSP430FR2000IPW16")(type "KiCad")(uri "${KIPRJMOD}/libraries/MSP430FR2000IPW16.pretty")(options "")(descr ""))
|
||||||
|
(lib (name "S05B-PASK-2")(type "KiCad")(uri "${KIPRJMOD}/libraries/S05B-PASK-2.pretty")(options "")(descr ""))
|
||||||
|
(lib (name "SN74LVC2G53DCT3")(type "KiCad")(uri "${KIPRJMOD}/libraries/SN74LVC2G53DCT3.pretty")(options "")(descr ""))
|
||||||
|
(lib (name "LTST-C195KGJRKT")(type "KiCad")(uri "${KIPRJMOD}/libraries/LTST-C195KGJRKT.pretty")(options "")(descr ""))
|
||||||
|
)
|
||||||
5248
libraries/LTST-C195KGJRKT.3dshapes/LTST-C195KGJRKT.step
Normal file
5248
libraries/LTST-C195KGJRKT.3dshapes/LTST-C195KGJRKT.step
Normal file
File diff suppressed because it is too large
Load diff
378
libraries/LTST-C195KGJRKT.kicad_sym
Normal file
378
libraries/LTST-C195KGJRKT.kicad_sym
Normal file
|
|
@ -0,0 +1,378 @@
|
||||||
|
(kicad_symbol_lib
|
||||||
|
(version 20231120)
|
||||||
|
(generator "kicad_symbol_editor")
|
||||||
|
(generator_version "8.0")
|
||||||
|
(symbol "LTST-C195KGJRKT"
|
||||||
|
(pin_names
|
||||||
|
(offset 1.016)
|
||||||
|
)
|
||||||
|
(exclude_from_sim no)
|
||||||
|
(in_bom yes)
|
||||||
|
(on_board yes)
|
||||||
|
(property "Reference" "U"
|
||||||
|
(at 9.398 0.254 0)
|
||||||
|
(effects
|
||||||
|
(font
|
||||||
|
(size 1.27 1.27)
|
||||||
|
)
|
||||||
|
(justify left bottom)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(property "Value" "LTST-C195KGJRKT"
|
||||||
|
(at 9.398 -2.032 0)
|
||||||
|
(effects
|
||||||
|
(font
|
||||||
|
(size 1.27 1.27)
|
||||||
|
)
|
||||||
|
(justify left bottom)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(property "Footprint" "LTST-C195KGJRKT:LTST-BILED-15X16"
|
||||||
|
(at 4.318 -10.922 0)
|
||||||
|
(effects
|
||||||
|
(font
|
||||||
|
(size 1.27 1.27)
|
||||||
|
)
|
||||||
|
(justify bottom)
|
||||||
|
(hide yes)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(property "Datasheet" "LTST-C195KGJRKT"
|
||||||
|
(at 18.542 -3.556 0)
|
||||||
|
(effects
|
||||||
|
(font
|
||||||
|
(size 1.27 1.27)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(property "Description" ""
|
||||||
|
(at 0 0 0)
|
||||||
|
(effects
|
||||||
|
(font
|
||||||
|
(size 1.27 1.27)
|
||||||
|
)
|
||||||
|
(hide yes)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(symbol "LTST-C195KGJRKT_0_0"
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy -4.572 1.524) (xy -5.461 0.635)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.1524)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy -3.81 0.762) (xy -4.699 -0.127)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.1524)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy -2.54 -0.254) (xy -3.81 -0.254)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.254)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy -2.54 -0.254) (xy -3.81 1.778)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.254)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy -1.27 -0.254) (xy -2.54 -0.254)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.254)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy -1.27 1.778) (xy -3.81 1.778)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.254)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy -1.27 1.778) (xy -2.54 -0.254)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.254)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy 3.048 1.524) (xy 2.159 0.635)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.1524)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy 3.81 0.762) (xy 2.921 -0.127)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.1524)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy 5.08 -0.254) (xy 3.81 -0.254)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.254)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy 5.08 -0.254) (xy 3.81 1.778)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.254)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy 5.08 2.54) (xy 5.08 0)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.1524)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(polyline
|
||||||
|
(pts
|
||||||
|
(xy 6.35 -0.254) (xy 5.08 -0.254)
|
||||||
|
)
|
||||||
|
(stroke
|
||||||
|
(width 0.254)
|
||||||
|
(type default)
|
||||||
|
)
|
||||||
|
(fill
|
||||||
|
(type none)
|
||||||
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164
libraries/LTST-C195KGJRKT.pretty/LTST-BILED-15X16.kicad_mod
Normal file
164
libraries/LTST-C195KGJRKT.pretty/LTST-BILED-15X16.kicad_mod
Normal file
|
|
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|
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|
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|
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|
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|
||||||
|
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|
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|
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|
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|
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|
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||||||
|
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|
||||||
|
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||||||
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
3553
libraries/MSP430FR2000IPW16.3dshapes/PW0016A.stp
Normal file
3553
libraries/MSP430FR2000IPW16.3dshapes/PW0016A.stp
Normal file
File diff suppressed because it is too large
Load diff
424
libraries/MSP430FR2000IPW16.kicad_sym
Normal file
424
libraries/MSP430FR2000IPW16.kicad_sym
Normal file
|
|
@ -0,0 +1,424 @@
|
||||||
|
(kicad_symbol_lib
|
||||||
|
(version 20231120)
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
(in_bom yes)
|
||||||
|
(on_board yes)
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
(property "Footprint" "PW16_TEX"
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
(hide yes)
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
(hide yes)
|
||||||
|
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|
||||||
|
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|
||||||
|
(property "Description" ""
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
(hide yes)
|
||||||
|
)
|
||||||
|
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|
||||||
|
(property "ki_locked" ""
|
||||||
|
(at 0 0 0)
|
||||||
|
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|
||||||
|
(font
|
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|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
(property "ki_keywords" "MSP430FR2000IPW16"
|
||||||
|
(at 0 0 0)
|
||||||
|
(effects
|
||||||
|
(font
|
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|
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|
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|
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|
||||||
|
(hide yes)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(property "ki_fp_filters" "PW16_TEX PW16_TEX-M PW16_TEX-L"
|
||||||
|
(at 0 0 0)
|
||||||
|
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|
||||||
|
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|
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|
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|
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|
||||||
|
(hide yes)
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(symbol "MSP430FR2000IPW16_0_1"
|
||||||
|
(polyline
|
||||||
|
(pts
|
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|
(xy 7.62 -26.67) (xy 34.29 -26.67)
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|
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||||||
|
(stroke
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1053
libraries/MSP430FR2000IPW16.pretty/PW16_TEX.kicad_mod
Normal file
1053
libraries/MSP430FR2000IPW16.pretty/PW16_TEX.kicad_mod
Normal file
File diff suppressed because it is too large
Load diff
13644
libraries/MSP430FR2000IRLLR.3dshapes/RLL0024A.stp
Normal file
13644
libraries/MSP430FR2000IRLLR.3dshapes/RLL0024A.stp
Normal file
File diff suppressed because it is too large
Load diff
576
libraries/MSP430FR2000IRLLR.kicad_sym
Normal file
576
libraries/MSP430FR2000IRLLR.kicad_sym
Normal file
|
|
@ -0,0 +1,576 @@
|
||||||
|
(kicad_symbol_lib
|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
|
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|
||||||
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
|
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|
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|
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|
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|
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|
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|
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||||||
1430
libraries/MSP430FR2000IRLLR.pretty/RLL24_TEX.kicad_mod
Normal file
1430
libraries/MSP430FR2000IRLLR.pretty/RLL24_TEX.kicad_mod
Normal file
File diff suppressed because it is too large
Load diff
22956
libraries/S05B-PASK-2.3dshapes/CONN-TH_S05B-PASK-2-LF-SN.step
Normal file
22956
libraries/S05B-PASK-2.3dshapes/CONN-TH_S05B-PASK-2-LF-SN.step
Normal file
File diff suppressed because it is too large
Load diff
374
libraries/S05B-PASK-2.kicad_sym
Normal file
374
libraries/S05B-PASK-2.kicad_sym
Normal file
|
|
@ -0,0 +1,374 @@
|
||||||
|
(kicad_symbol_lib (version 20211014) (generator kicad_symbol_editor)
|
||||||
|
(symbol "S05B-PASK-2LFSN" (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
|
||||||
|
(property "Reference" "J" (id 0) (at 8.89 6.35 0)
|
||||||
|
(effects (font (size 1.524 1.524)))
|
||||||
|
)
|
||||||
|
(property "Value" "S05B-PASK-2LFSN" (id 1) (at 0 0 0)
|
||||||
|
(effects (font (size 1.524 1.524)))
|
||||||
|
)
|
||||||
|
(property "Footprint" "CONN_S05B-PASK-2_JST" (id 2) (at 0 0 0)
|
||||||
|
(effects (font (size 1.27 1.27) italic) hide)
|
||||||
|
)
|
||||||
|
(property "Datasheet" "S05B-PASK-2LFSN" (id 3) (at 0 0 0)
|
||||||
|
(effects (font (size 1.27 1.27) italic) hide)
|
||||||
|
)
|
||||||
|
(property "ki_keywords" "S05B-PASK-2(LF)(SN)" (id 4) (at 0 0 0)
|
||||||
|
(effects (font (size 1.27 1.27)) hide)
|
||||||
|
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285
libraries/S05B-PASK-2.pretty/CONN_S05B-PASK-2_JST.kicad_mod
Normal file
285
libraries/S05B-PASK-2.pretty/CONN_S05B-PASK-2_JST.kicad_mod
Normal file
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@ -0,0 +1,285 @@
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3671
libraries/SN74LVC2G53DCT3.3dshapes/DCT0008A.stp
Normal file
3671
libraries/SN74LVC2G53DCT3.3dshapes/DCT0008A.stp
Normal file
File diff suppressed because it is too large
Load diff
278
libraries/SN74LVC2G53DCT3.kicad_sym
Normal file
278
libraries/SN74LVC2G53DCT3.kicad_sym
Normal file
|
|
@ -0,0 +1,278 @@
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|
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|
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|
||||||
|
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|
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|
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|
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|
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|
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615
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|
||||||
BIN
olimex-uext-2024.5.pdf
Normal file
BIN
olimex-uext-2024.5.pdf
Normal file
Binary file not shown.
BIN
olimex-uext-back-2024.5.png
Normal file
BIN
olimex-uext-back-2024.5.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 537 KiB |
BIN
olimex-uext-front-2024.5.png
Normal file
BIN
olimex-uext-front-2024.5.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 666 KiB |
133
olimex-uext.kicad_dru
Normal file
133
olimex-uext.kicad_dru
Normal file
|
|
@ -0,0 +1,133 @@
|
||||||
|
(version 1)
|
||||||
|
# Custom Design Rules (DRC) for KiCAD 7.0 (Stored in '<project>.kicad_dru' file).
|
||||||
|
#
|
||||||
|
# Matching JLCPCB capabilities: https://jlcpcb.com/capabilities/pcb-capabilities
|
||||||
|
#
|
||||||
|
# KiCad documentation: https://docs.kicad.org/master/id/pcbnew/pcbnew_advanced.html#custom_design_rules
|
||||||
|
#
|
||||||
|
# Inspiration
|
||||||
|
# - https://gist.github.com/darkxst/f713268e5469645425eed40115fb8b49 (with comments)
|
||||||
|
# - https://gist.github.com/denniskupec/e163d13b0a64c2044bd259f64659485e (with comments)
|
||||||
|
|
||||||
|
# TODO new rule: NPTH pads.
|
||||||
|
# Inner diameter of pad should be 0.4-0.5 mm larger than NPTH drill diameter.
|
||||||
|
# JLCPCB: "We make NPTH via dry sealing film process, if customer would like a NPTH but around with pad/copper, our engineer will dig out around pad/copper about 0.2mm-0.25mm, otherwise the metal potion will be flowed into the hole and it becomes a PTH. (there will be no copper dig out optimization for single board)."
|
||||||
|
|
||||||
|
# TODO: new rule for plated slots: min diameter/width 0.5mm
|
||||||
|
# JLCPCB: "The minimum plated slot width is 0.5mm, which is drawn with a pad."
|
||||||
|
|
||||||
|
# TODO new rule: non-plated slots: min diameter/width 1.0mm
|
||||||
|
# JLCPCB: "The minimum Non-Plated Slot Width is 1.0mm, please draw the slot outline in the mechanical layer(GML or GKO)""
|
||||||
|
|
||||||
|
(rule "Track width, outer layer (1oz copper)"
|
||||||
|
(layer outer)
|
||||||
|
(condition "A.Type == 'track'")
|
||||||
|
(constraint track_width (min 0.127mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Track spacing, outer layer (1oz copper)"
|
||||||
|
(layer outer)
|
||||||
|
(condition "A.Type == 'track' && B.Type == A.Type")
|
||||||
|
(constraint clearance (min 0.127mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Track width, inner layer"
|
||||||
|
(layer inner)
|
||||||
|
(condition "A.Type == 'track'")
|
||||||
|
(constraint track_width (min 0.09mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Track spacing, inner layer"
|
||||||
|
(layer inner)
|
||||||
|
(condition "A.Type == 'track' && B.Type == A.Type")
|
||||||
|
(constraint clearance (min 0.09mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Silkscreen text"
|
||||||
|
(layer "?.Silkscreen")
|
||||||
|
(condition "A.Type == 'Text' || A.Type == 'Text Box'")
|
||||||
|
(constraint text_thickness (min 0.15mm))
|
||||||
|
(constraint text_height (min 1mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Pad to Silkscreen"
|
||||||
|
(layer outer)
|
||||||
|
(condition "A.Type == 'pad' && B.Layer == '?.Silkscreen'")
|
||||||
|
(constraint silk_clearance (min 0.15mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Edge (routed) to track clearance"
|
||||||
|
(condition "A.Type == 'track'")
|
||||||
|
(constraint edge_clearance (min 0.3mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
#(rule "Edge (v-cut) to track clearance"
|
||||||
|
# (condition "A.Type == 'track'")
|
||||||
|
# (constraint edge_clearance (min 0.4mm))
|
||||||
|
#)
|
||||||
|
|
||||||
|
# JLCPCB restrictions ambiguous:
|
||||||
|
# Illustration: 0.2 mm, 1&2 layer: 0.3 mm, multilayer: "(0.15mm more costly)"
|
||||||
|
# This rule handles diameter minimum and maximum for ALL holes.
|
||||||
|
# Other specialized rules handle restrictions (e.g. Via, PTH, NPTH)
|
||||||
|
(rule "Hole diameter"
|
||||||
|
(constraint hole_size (min 0.2mm) (max 6.3mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Hole (NPTH) diameter"
|
||||||
|
(layer outer)
|
||||||
|
(condition "!A.isPlated()")
|
||||||
|
(constraint hole_size (min 0.4mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
# TODO: Hole to board edge ≥ 1 mm. Min. board size 10 × 10 mm
|
||||||
|
(rule "Hole (castellated) diameter"
|
||||||
|
(layer outer)
|
||||||
|
(condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'")
|
||||||
|
(constraint hole_size (min 0.6mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
# JLCPCB: "Via diameter should be 0.1mm(0.15mm preferred) larger than Via hole size" (illustration shows diameters for both dimensions)
|
||||||
|
# JLCPCB: PTH: "The annular ring size will be enlarged to 0.15mm in production."
|
||||||
|
(rule "Annular ring width (via and PTH)"
|
||||||
|
(layer outer)
|
||||||
|
(condition "A.isPlated()")
|
||||||
|
(constraint annular_width (min 0.075mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Clearance: hole to hole (perimeter), different nets"
|
||||||
|
(layer outer)
|
||||||
|
(condition "A.Net != B.Net")
|
||||||
|
(constraint hole_to_hole (min 0.5mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Clearance: hole to hole (perimeter), same net"
|
||||||
|
(layer outer)
|
||||||
|
(condition "A.Net == B.Net")
|
||||||
|
(constraint hole_to_hole (min 0.254mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Clearance: track to NPTH hole (perimeter)"
|
||||||
|
# (condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'track' && A.Net != B.Net")
|
||||||
|
(condition "!A.isPlated() && B.Type == 'track' && A.Net != B.Net")
|
||||||
|
(constraint hole_clearance (min 0.254mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Clearance: track to PTH hole perimeter"
|
||||||
|
(condition "A.isPlated() && B.Type == 'track' && A.Net != B.Net")
|
||||||
|
(constraint hole_clearance (min 0.33mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
# TODO: try combining with rule "Clearance: PTH to track, different nets"
|
||||||
|
(rule "Clearance: track to pad"
|
||||||
|
(condition "A.Type == 'pad' && B.Type == 'track' && A.Net != B.Net")
|
||||||
|
(constraint clearance (min 0.25mm))
|
||||||
|
)
|
||||||
|
|
||||||
|
(rule "Clearance: pad/via to pad/via"
|
||||||
|
(layer outer)
|
||||||
|
# (condition "(A.Type == 'Pad' || A.Type == 'Via') && (B.Type == 'Pad' || B.Type == 'Via') && A.Net != B.Net")
|
||||||
|
(condition "A.isPlated() && B.isPlated() && A.Net != B.Net")
|
||||||
|
(constraint clearance (min 0.2mm))
|
||||||
|
)
|
||||||
|
|
||||||
18636
olimex-uext.kicad_pcb
Normal file
18636
olimex-uext.kicad_pcb
Normal file
File diff suppressed because it is too large
Load diff
83
olimex-uext.kicad_prl
Normal file
83
olimex-uext.kicad_prl
Normal file
|
|
@ -0,0 +1,83 @@
|
||||||
|
{
|
||||||
|
"board": {
|
||||||
|
"active_layer": 0,
|
||||||
|
"active_layer_preset": "All Layers",
|
||||||
|
"auto_track_width": true,
|
||||||
|
"hidden_netclasses": [],
|
||||||
|
"hidden_nets": [],
|
||||||
|
"high_contrast_mode": 1,
|
||||||
|
"net_color_mode": 1,
|
||||||
|
"opacity": {
|
||||||
|
"images": 0.6,
|
||||||
|
"pads": 1.0,
|
||||||
|
"tracks": 1.0,
|
||||||
|
"vias": 1.0,
|
||||||
|
"zones": 0.6
|
||||||
|
},
|
||||||
|
"selection_filter": {
|
||||||
|
"dimensions": true,
|
||||||
|
"footprints": true,
|
||||||
|
"graphics": true,
|
||||||
|
"keepouts": true,
|
||||||
|
"lockedItems": false,
|
||||||
|
"otherItems": true,
|
||||||
|
"pads": true,
|
||||||
|
"text": true,
|
||||||
|
"tracks": true,
|
||||||
|
"vias": true,
|
||||||
|
"zones": true
|
||||||
|
},
|
||||||
|
"visible_items": [
|
||||||
|
0,
|
||||||
|
1,
|
||||||
|
2,
|
||||||
|
3,
|
||||||
|
4,
|
||||||
|
5,
|
||||||
|
8,
|
||||||
|
9,
|
||||||
|
10,
|
||||||
|
11,
|
||||||
|
12,
|
||||||
|
13,
|
||||||
|
15,
|
||||||
|
16,
|
||||||
|
17,
|
||||||
|
18,
|
||||||
|
19,
|
||||||
|
20,
|
||||||
|
21,
|
||||||
|
22,
|
||||||
|
23,
|
||||||
|
24,
|
||||||
|
25,
|
||||||
|
26,
|
||||||
|
27,
|
||||||
|
28,
|
||||||
|
29,
|
||||||
|
30,
|
||||||
|
32,
|
||||||
|
33,
|
||||||
|
34,
|
||||||
|
35,
|
||||||
|
36,
|
||||||
|
39,
|
||||||
|
40
|
||||||
|
],
|
||||||
|
"visible_layers": "fffffff_ffffffff",
|
||||||
|
"zone_display_mode": 0
|
||||||
|
},
|
||||||
|
"git": {
|
||||||
|
"repo_password": "",
|
||||||
|
"repo_type": "",
|
||||||
|
"repo_username": "",
|
||||||
|
"ssh_key": ""
|
||||||
|
},
|
||||||
|
"meta": {
|
||||||
|
"filename": "olimex-uext.kicad_prl",
|
||||||
|
"version": 3
|
||||||
|
},
|
||||||
|
"project": {
|
||||||
|
"files": []
|
||||||
|
}
|
||||||
|
}
|
||||||
642
olimex-uext.kicad_pro
Normal file
642
olimex-uext.kicad_pro
Normal file
|
|
@ -0,0 +1,642 @@
|
||||||
|
{
|
||||||
|
"board": {
|
||||||
|
"3dviewports": [],
|
||||||
|
"design_settings": {
|
||||||
|
"defaults": {
|
||||||
|
"apply_defaults_to_fp_fields": false,
|
||||||
|
"apply_defaults_to_fp_shapes": false,
|
||||||
|
"apply_defaults_to_fp_text": false,
|
||||||
|
"board_outline_line_width": 0.05,
|
||||||
|
"copper_line_width": 0.2,
|
||||||
|
"copper_text_italic": false,
|
||||||
|
"copper_text_size_h": 1.5,
|
||||||
|
"copper_text_size_v": 1.5,
|
||||||
|
"copper_text_thickness": 0.3,
|
||||||
|
"copper_text_upright": false,
|
||||||
|
"courtyard_line_width": 0.05,
|
||||||
|
"dimension_precision": 4,
|
||||||
|
"dimension_units": 3,
|
||||||
|
"dimensions": {
|
||||||
|
"arrow_length": 1270000,
|
||||||
|
"extension_offset": 500000,
|
||||||
|
"keep_text_aligned": true,
|
||||||
|
"suppress_zeroes": false,
|
||||||
|
"text_position": 0,
|
||||||
|
"units_format": 1
|
||||||
|
},
|
||||||
|
"fab_line_width": 0.1,
|
||||||
|
"fab_text_italic": false,
|
||||||
|
"fab_text_size_h": 1.0,
|
||||||
|
"fab_text_size_v": 1.0,
|
||||||
|
"fab_text_thickness": 0.15,
|
||||||
|
"fab_text_upright": false,
|
||||||
|
"other_line_width": 0.1,
|
||||||
|
"other_text_italic": false,
|
||||||
|
"other_text_size_h": 1.0,
|
||||||
|
"other_text_size_v": 1.0,
|
||||||
|
"other_text_thickness": 0.15,
|
||||||
|
"other_text_upright": false,
|
||||||
|
"pads": {
|
||||||
|
"drill": 0.762,
|
||||||
|
"height": 1.524,
|
||||||
|
"width": 1.524
|
||||||
|
},
|
||||||
|
"silk_line_width": 0.1,
|
||||||
|
"silk_text_italic": false,
|
||||||
|
"silk_text_size_h": 1.0,
|
||||||
|
"silk_text_size_v": 1.0,
|
||||||
|
"silk_text_thickness": 0.1,
|
||||||
|
"silk_text_upright": false,
|
||||||
|
"zones": {
|
||||||
|
"min_clearance": 0.25
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"diff_pair_dimensions": [
|
||||||
|
{
|
||||||
|
"gap": 0.0,
|
||||||
|
"via_gap": 0.0,
|
||||||
|
"width": 0.0
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"drc_exclusions": [
|
||||||
|
"lib_footprint_mismatch|145825000|119690000|7272b124-daf1-447a-8ee5-0247754ff6e3|00000000-0000-0000-0000-000000000000",
|
||||||
|
"lib_footprint_mismatch|151241666|119700000|30f7d6be-1e64-4542-bb1f-05798352e9e4|00000000-0000-0000-0000-000000000000",
|
||||||
|
"lib_footprint_mismatch|156658332|119700000|71c13897-9736-47ec-9b60-4dbc576346cf|00000000-0000-0000-0000-000000000000",
|
||||||
|
"lib_footprint_mismatch|160540000|128770000|4502aa0f-910a-4c4d-bad2-2775ec371ee7|00000000-0000-0000-0000-000000000000",
|
||||||
|
"lib_footprint_mismatch|162075000|119700000|8fe17254-cb1e-404a-94ae-5c4a5ab058b2|00000000-0000-0000-0000-000000000000",
|
||||||
|
"lib_footprint_mismatch|167425000|119700000|4d30ffec-a609-4e96-9a7f-0beb3de74e75|00000000-0000-0000-0000-000000000000"
|
||||||
|
],
|
||||||
|
"meta": {
|
||||||
|
"version": 2
|
||||||
|
},
|
||||||
|
"rule_severities": {
|
||||||
|
"annular_width": "error",
|
||||||
|
"clearance": "error",
|
||||||
|
"connection_width": "warning",
|
||||||
|
"copper_edge_clearance": "error",
|
||||||
|
"copper_sliver": "warning",
|
||||||
|
"courtyards_overlap": "error",
|
||||||
|
"diff_pair_gap_out_of_range": "error",
|
||||||
|
"diff_pair_uncoupled_length_too_long": "error",
|
||||||
|
"drill_out_of_range": "error",
|
||||||
|
"duplicate_footprints": "warning",
|
||||||
|
"extra_footprint": "warning",
|
||||||
|
"footprint": "error",
|
||||||
|
"footprint_symbol_mismatch": "warning",
|
||||||
|
"footprint_type_mismatch": "ignore",
|
||||||
|
"hole_clearance": "error",
|
||||||
|
"hole_near_hole": "error",
|
||||||
|
"holes_co_located": "warning",
|
||||||
|
"invalid_outline": "error",
|
||||||
|
"isolated_copper": "warning",
|
||||||
|
"item_on_disabled_layer": "error",
|
||||||
|
"items_not_allowed": "error",
|
||||||
|
"length_out_of_range": "error",
|
||||||
|
"lib_footprint_issues": "warning",
|
||||||
|
"lib_footprint_mismatch": "warning",
|
||||||
|
"malformed_courtyard": "error",
|
||||||
|
"microvia_drill_out_of_range": "error",
|
||||||
|
"missing_courtyard": "ignore",
|
||||||
|
"missing_footprint": "warning",
|
||||||
|
"net_conflict": "warning",
|
||||||
|
"npth_inside_courtyard": "ignore",
|
||||||
|
"padstack": "warning",
|
||||||
|
"pth_inside_courtyard": "ignore",
|
||||||
|
"shorting_items": "error",
|
||||||
|
"silk_edge_clearance": "warning",
|
||||||
|
"silk_over_copper": "warning",
|
||||||
|
"silk_overlap": "warning",
|
||||||
|
"skew_out_of_range": "error",
|
||||||
|
"solder_mask_bridge": "error",
|
||||||
|
"starved_thermal": "error",
|
||||||
|
"text_height": "warning",
|
||||||
|
"text_thickness": "warning",
|
||||||
|
"through_hole_pad_without_hole": "error",
|
||||||
|
"too_many_vias": "error",
|
||||||
|
"track_dangling": "warning",
|
||||||
|
"track_width": "error",
|
||||||
|
"tracks_crossing": "error",
|
||||||
|
"unconnected_items": "error",
|
||||||
|
"unresolved_variable": "error",
|
||||||
|
"via_dangling": "warning",
|
||||||
|
"zones_intersect": "error"
|
||||||
|
},
|
||||||
|
"rules": {
|
||||||
|
"max_error": 0.005,
|
||||||
|
"min_clearance": 0.0,
|
||||||
|
"min_connection": 0.0,
|
||||||
|
"min_copper_edge_clearance": 0.5,
|
||||||
|
"min_hole_clearance": 0.25,
|
||||||
|
"min_hole_to_hole": 0.25,
|
||||||
|
"min_microvia_diameter": 0.2,
|
||||||
|
"min_microvia_drill": 0.1,
|
||||||
|
"min_resolved_spokes": 2,
|
||||||
|
"min_silk_clearance": 0.0,
|
||||||
|
"min_text_height": 0.8,
|
||||||
|
"min_text_thickness": 0.1,
|
||||||
|
"min_through_hole_diameter": 0.3,
|
||||||
|
"min_track_width": 0.0,
|
||||||
|
"min_via_annular_width": 0.15,
|
||||||
|
"min_via_diameter": 0.5,
|
||||||
|
"solder_mask_to_copper_clearance": 0.005,
|
||||||
|
"use_height_for_length_calcs": true
|
||||||
|
},
|
||||||
|
"teardrop_options": [
|
||||||
|
{
|
||||||
|
"td_onpadsmd": true,
|
||||||
|
"td_onroundshapesonly": false,
|
||||||
|
"td_ontrackend": false,
|
||||||
|
"td_onviapad": true
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"teardrop_parameters": [
|
||||||
|
{
|
||||||
|
"td_allow_use_two_tracks": true,
|
||||||
|
"td_curve_segcount": 0,
|
||||||
|
"td_height_ratio": 1.0,
|
||||||
|
"td_length_ratio": 0.5,
|
||||||
|
"td_maxheight": 2.0,
|
||||||
|
"td_maxlen": 1.0,
|
||||||
|
"td_on_pad_in_zone": false,
|
||||||
|
"td_target_name": "td_round_shape",
|
||||||
|
"td_width_to_size_filter_ratio": 0.9
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"td_allow_use_two_tracks": true,
|
||||||
|
"td_curve_segcount": 0,
|
||||||
|
"td_height_ratio": 1.0,
|
||||||
|
"td_length_ratio": 0.5,
|
||||||
|
"td_maxheight": 2.0,
|
||||||
|
"td_maxlen": 1.0,
|
||||||
|
"td_on_pad_in_zone": false,
|
||||||
|
"td_target_name": "td_rect_shape",
|
||||||
|
"td_width_to_size_filter_ratio": 0.9
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"td_allow_use_two_tracks": true,
|
||||||
|
"td_curve_segcount": 0,
|
||||||
|
"td_height_ratio": 1.0,
|
||||||
|
"td_length_ratio": 0.5,
|
||||||
|
"td_maxheight": 2.0,
|
||||||
|
"td_maxlen": 1.0,
|
||||||
|
"td_on_pad_in_zone": false,
|
||||||
|
"td_target_name": "td_track_end",
|
||||||
|
"td_width_to_size_filter_ratio": 0.9
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"track_widths": [
|
||||||
|
0.0,
|
||||||
|
0.5
|
||||||
|
],
|
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|
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|
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|
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|
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|
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|
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|
||||||
|
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|
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|
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|
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|
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|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
||||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
|
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|
||||||
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
|
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|
||||||
|
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|
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|
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|
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|
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|
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|
"spice_save_all_dissipations": false,
|
||||||
|
"spice_save_all_voltages": false,
|
||||||
|
"subpart_first_id": 65,
|
||||||
|
"subpart_id_separator": 0
|
||||||
|
},
|
||||||
|
"sheets": [
|
||||||
|
[
|
||||||
|
"b5c1c3ee-3b71-4e98-b3f5-28edbcb92482",
|
||||||
|
"Root"
|
||||||
|
]
|
||||||
|
],
|
||||||
|
"text_variables": {}
|
||||||
|
}
|
||||||
14430
olimex-uext.kicad_sch
Normal file
14430
olimex-uext.kicad_sch
Normal file
File diff suppressed because it is too large
Load diff
BIN
production/Olimex_UEXT_Adapter_for_MUART_Failsafe_2024.5.zip
Normal file
BIN
production/Olimex_UEXT_Adapter_for_MUART_Failsafe_2024.5.zip
Normal file
Binary file not shown.
14
production/bom.csv
Normal file
14
production/bom.csv
Normal file
|
|
@ -0,0 +1,14 @@
|
||||||
|
Designator,Footprint,Quantity,Value,LCSC Part #
|
||||||
|
C1,0603,1,1n,C519404
|
||||||
|
"C2, C3, C4, C5, C6",0603,5,100n,C92490
|
||||||
|
C7,1206,1,10u,C70462
|
||||||
|
"J1, J4",CONN_S05B-PASK-2_JST,2,~,C489718
|
||||||
|
J6,IDC-Header_2x05_P2.54mm_Vertical,1,~,C429962
|
||||||
|
"Q1, Q2, Q3, Q4, Q5",SOT-23,5,~,C78284
|
||||||
|
"R1, R2",0603,2,680,C112310
|
||||||
|
"R10, R11, R12, R13, R4, R5, R6, R7, R8, R9",0603,10,10K,C98220
|
||||||
|
"R14, R15",0603,2,270,C137754
|
||||||
|
R3,0603,1,47K,C105579
|
||||||
|
"U1, U7",LTST-BILED-15X16,2,~,C125104
|
||||||
|
"U2, U3, U4, U5",DCT8,4,~,C201617
|
||||||
|
U6,PW16_TEX,1,~,C2053192
|
||||||
|
43
production/designators.csv
Normal file
43
production/designators.csv
Normal file
|
|
@ -0,0 +1,43 @@
|
||||||
|
C1:1
|
||||||
|
C2:1
|
||||||
|
C3:1
|
||||||
|
C4:1
|
||||||
|
C5:1
|
||||||
|
C6:1
|
||||||
|
C7:1
|
||||||
|
H1:1
|
||||||
|
H2:1
|
||||||
|
H3:1
|
||||||
|
J1:1
|
||||||
|
J2:1
|
||||||
|
J3:1
|
||||||
|
J4:1
|
||||||
|
J5:1
|
||||||
|
J6:1
|
||||||
|
Q1:1
|
||||||
|
Q2:1
|
||||||
|
Q3:1
|
||||||
|
Q4:1
|
||||||
|
Q5:1
|
||||||
|
R1:1
|
||||||
|
R10:1
|
||||||
|
R11:1
|
||||||
|
R12:1
|
||||||
|
R13:1
|
||||||
|
R14:1
|
||||||
|
R15:1
|
||||||
|
R2:1
|
||||||
|
R3:1
|
||||||
|
R4:1
|
||||||
|
R5:1
|
||||||
|
R6:1
|
||||||
|
R7:1
|
||||||
|
R8:1
|
||||||
|
R9:1
|
||||||
|
U1:1
|
||||||
|
U2:1
|
||||||
|
U3:1
|
||||||
|
U4:1
|
||||||
|
U5:1
|
||||||
|
U6:1
|
||||||
|
U7:1
|
||||||
|
191
production/netlist.ipc
Normal file
191
production/netlist.ipc
Normal file
|
|
@ -0,0 +1,191 @@
|
||||||
|
P CODE 00
|
||||||
|
P UNITS CUST 0
|
||||||
|
P arrayDim N
|
||||||
|
317+3V3 VIA MD0079PA00X+067569Y-048484X0236Y0000R000S3
|
||||||
|
317+3V3 VIA MD0079PA00X+058693Y-048189X0236Y0000R000S3
|
||||||
|
317+3V3 VIA MD0079PA00X+060800Y-048189X0236Y0000R000S3
|
||||||
|
317+3V3 VIA MD0079PA00X+062945Y-048189X0236Y0000R000S3
|
||||||
|
317+3V3 VIA MD0079PA00X+056604Y-048189X0236Y0000R000S3
|
||||||
|
317+3V3 VIA MD0079PA00X+065071Y-048189X0236Y0000R000S3
|
||||||
|
317GND VIA MD0079PA00X+062441Y-045276X0236Y0000R000S3
|
||||||
|
317GND VIA MD0079PA00X+056083Y-045276X0236Y0000R000S3
|
||||||
|
317GND VIA MD0079PA00X+058189Y-045276X0236Y0000R000S3
|
||||||
|
317GND VIA MD0079PA00X+062835Y-041772X0236Y0000R000S3
|
||||||
|
317GND VIA MD0079PA00X+067687Y-045728X0236Y0000R000S3
|
||||||
|
317GND VIA MD0079PA00X+068376Y-042323X0236Y0000R000S3
|
||||||
|
317GND VIA MD0079PA00X+060315Y-045276X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+062441Y-043406X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+062559Y-039331X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+064272Y-045364X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+056083Y-043406X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+060315Y-043406X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+058189Y-043406X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+060719Y-047756X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+062844Y-047756X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+064941Y-047756X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+056417Y-047756X0236Y0000R000S3
|
||||||
|
317+5V VIA MD0079PA00X+058573Y-047756X0236Y0000R000S3
|
||||||
|
317/TH_RX VIA MD0079PA00X+063366Y-046004X0236Y0000R000S3
|
||||||
|
317/TH_RX VIA MD0079PA00X+059626Y-043406X0236Y0000R000S3
|
||||||
|
317/TH_TX VIA MD0079PA00X+057500Y-043406X0236Y0000R000S3
|
||||||
|
317/TH_TX VIA MD0079PA00X+061240Y-046004X0236Y0000R000S3
|
||||||
|
317{INPUT_SEL_5V} VIA MD0079PA00X+057244Y-044685X0236Y0000R000S3
|
||||||
|
317{INPUT_SEL_5V} VIA MD0079PA00X+063455Y-041762X0236Y0000R000S3
|
||||||
|
317{INPUT_SEL_5V} VIA MD0079PA00X+063110Y-044685X0236Y0000R000S3
|
||||||
|
317{INPUT_SEL_5V} VIA MD0079PA00X+058839Y-044685X0236Y0000R000S3
|
||||||
|
317{INPUT_SEL_5V} VIA MD0079PA00X+059370Y-044685X0236Y0000R000S3
|
||||||
|
317{INPUT_SEL_5V} VIA MD0079PA00X+056732Y-044685X0236Y0000R000S3
|
||||||
|
317{INPUT_SEL_5V} VIA MD0079PA00X+060984Y-044685X0236Y0000R000S3
|
||||||
|
327~{HOST_ACTIVE} U6 -1 A01X+067504Y-045246X0580Y0140R180S2
|
||||||
|
327INPUT_SEL_3V3} U6 -2 A01X+067504Y-044990X0580Y0140R180S2
|
||||||
|
327NET-(J5-PIN_3) U6 -3 A01X+067504Y-044734X0580Y0140R180S2
|
||||||
|
327NET-(J5-PIN_2) U6 -4 A01X+067504Y-044478X0580Y0140R180S2
|
||||||
|
327+3V3 U6 -5 A01X+067504Y-044222X0580Y0140R180S2
|
||||||
|
327GND U6 -6 A01X+067504Y-043967X0580Y0140R180S2
|
||||||
|
327(U6-P2.7-PAD7) U6 -7 A01X+067504Y-043711X0580Y0140R180S2
|
||||||
|
327(U6-P2.6-PAD8) U6 -8 A01X+067504Y-043455X0580Y0140R180S2
|
||||||
|
327(U6-P2.1-PAD9) U6 -9 A01X+065204Y-043455X0580Y0140R180S2
|
||||||
|
327U6-P2.0-PAD10) U6 -10 A01X+065204Y-043711X0580Y0140R180S2
|
||||||
|
327U6-P1.7-PAD11) U6 -11 A01X+065204Y-043967X0580Y0140R180S2
|
||||||
|
327U6-P1.6-PAD12) U6 -12 A01X+065204Y-044222X0580Y0140R180S2
|
||||||
|
327U6-P1.5-PAD13) U6 -13 A01X+065204Y-044478X0580Y0140R180S2
|
||||||
|
327U6-P1.4-PAD14) U6 -14 A01X+065204Y-044734X0580Y0140R180S2
|
||||||
|
327U6-P1.3-PAD15) U6 -15 A01X+065204Y-044990X0580Y0140R180S2
|
||||||
|
327U6-P1.2-PAD16) U6 -16 A01X+065204Y-045246X0580Y0140R180S2
|
||||||
|
327NET-(J5-PIN_2) C1 -1 A01X+069911Y-042362X0354Y0374R270S2
|
||||||
|
327GND C1 -2 A01X+069911Y-041752X0354Y0374R270S2
|
||||||
|
327+3V3 Q2 -1 A01X+059170Y-047495X0581Y0236R270S2
|
||||||
|
327HOST_TH_TX_3V3 Q2 -2 A01X+059918Y-047495X0581Y0236R270S2
|
||||||
|
327/HOST_TH_TX_5V Q2 -3 A01X+059544Y-046757X0581Y0236R270S2
|
||||||
|
317+3V3 J5 -1 D0394PA00X+069685Y-045425X0669Y0669R000S0
|
||||||
|
317NET-(J5-PIN_2) J5 -2 D0394PA00X+069685Y-046425X0669Y0669R000S0
|
||||||
|
317NET-(J5-PIN_3) J5 -3 D0394PA00X+069685Y-047425X0669Y0669R000S0
|
||||||
|
317GND J5 -4 D0394PA00X+069685Y-048425X0669Y0669R000S0
|
||||||
|
327+5V C4 -1 A01X+060315Y-043888X0354Y0374R090S2
|
||||||
|
327GND C4 -2 A01X+060315Y-044498X0354Y0374R090S2
|
||||||
|
317+3V3 J6 -1 D0394PA00X+065205Y-050197X0669Y0669R090S0
|
||||||
|
317GND J6 -2 D0394PA00X+065205Y-051197X0669Y0000R090S0
|
||||||
|
317HOST_HP_TX_3V3 J6 -3 D0394PA00X+064205Y-050197X0669Y0000R090S0
|
||||||
|
317HOST_HP_RX_3V3 J6 -4 D0394PA00X+064205Y-051197X0669Y0000R090S0
|
||||||
|
317HOST_TH_TX_3V3 J6 -5 D0394PA00X+063205Y-050197X0669Y0000R090S0
|
||||||
|
317HOST_TH_RX_3V3 J6 -6 D0394PA00X+063205Y-051197X0669Y0000R090S0
|
||||||
|
317~{HOST_ACTIVE} J6 -7 D0394PA00X+062205Y-050197X0669Y0000R090S0
|
||||||
|
317J6-PIN_8-PAD8) J6 -8 D0394PA00X+062205Y-051197X0669Y0000R090S0
|
||||||
|
317J6-PIN_9-PAD9) J6 -9 D0394PA00X+061205Y-050197X0669Y0000R090S0
|
||||||
|
317-PIN_10-PAD10) J6 -10 D0394PA00X+061205Y-051197X0669Y0000R090S0
|
||||||
|
317+12V J4 -1 D0280PA00X+068150Y-039843X0480Y0000R270S0
|
||||||
|
317GND J4 -2 D0280PA00X+068150Y-039055X0480Y0000R270S0
|
||||||
|
317+5V J4 -3 D0280PA00X+068150Y-038268X0480Y0000R270S0
|
||||||
|
317/HP_TX J4 -4 D0280PA00X+068150Y-037480X0480Y0000R270S0
|
||||||
|
317/HP_RX J4 -5 D0280PA00X+068150Y-036693X0480Y0000R270S0
|
||||||
|
327+3V3 Q5 -1 A01X+065541Y-047495X0581Y0236R270S2
|
||||||
|
327INPUT_SEL_3V3} Q5 -2 A01X+066289Y-047495X0581Y0236R270S2
|
||||||
|
327{INPUT_SEL_5V} Q5 -3 A01X+065915Y-046757X0581Y0236R270S2
|
||||||
|
327NET-(R2-PAD1) R2 -1 A01X+063460Y-040644X0315Y0374R090S2
|
||||||
|
327{INPUT_SEL_5V} R2 -2 A01X+063460Y-041294X0315Y0374R090S2
|
||||||
|
327+5V R5 -1 A01X+060719Y-047274X0315Y0374R270S2
|
||||||
|
327/HOST_HP_TX_5V R5 -2 A01X+060719Y-046624X0315Y0374R270S2
|
||||||
|
327+3V3 R9 -1 A01X+057052Y-048189X0315Y0374R000S2
|
||||||
|
327HOST_TH_RX_3V3 R9 -2 A01X+057702Y-048189X0315Y0374R000S2
|
||||||
|
317+12V J2 -1 D0394PA00X+060394Y-036484X0669Y0669R000S0
|
||||||
|
317GND J2 -2 D0394PA00X+060394Y-037484X0669Y0669R000S0
|
||||||
|
317+5V J2 -3 D0394PA00X+060394Y-038484X0669Y0669R000S0
|
||||||
|
317/TH_RX J2 -4 D0394PA00X+060394Y-039484X0669Y0669R000S0
|
||||||
|
317/TH_TX J2 -5 D0394PA00X+060394Y-040484X0669Y0669R000S0
|
||||||
|
327+5V R4 -1 A01X+056427Y-047274X0315Y0374R270S2
|
||||||
|
327/HOST_TH_RX_5V R4 -2 A01X+056427Y-046624X0315Y0374R270S2
|
||||||
|
327/HP_RX U4 -1 A01X+061749Y-044039X0615Y0140R090S2
|
||||||
|
327GND U4 -2 A01X+061493Y-044039X0615Y0140R090S2
|
||||||
|
327GND U4 -3 A01X+061237Y-044039X0615Y0140R090S2
|
||||||
|
327GND U4 -4 A01X+060981Y-044039X0615Y0140R090S2
|
||||||
|
327{INPUT_SEL_5V} U4 -5 A01X+060981Y-045374X0615Y0140R090S2
|
||||||
|
327/TH_TX U4 -6 A01X+061237Y-045374X0615Y0140R090S2
|
||||||
|
327/HOST_HP_TX_5V U4 -7 A01X+061493Y-045374X0615Y0140R090S2
|
||||||
|
327+5V U4 -8 A01X+061749Y-045374X0615Y0140R090S2
|
||||||
|
327+3V3 C6 -1 A01X+068406Y-043533X0354Y0374R270S2
|
||||||
|
327GND C6 -2 A01X+068406Y-042923X0354Y0374R270S2
|
||||||
|
327+3V3 Q3 -1 A01X+061302Y-047495X0581Y0236R270S2
|
||||||
|
327HOST_HP_TX_3V3 Q3 -2 A01X+062051Y-047495X0581Y0236R270S2
|
||||||
|
327/HOST_HP_TX_5V Q3 -3 A01X+061677Y-046757X0581Y0236R270S2
|
||||||
|
327+3V3 Q1 -1 A01X+057037Y-047491X0581Y0236R270S2
|
||||||
|
327HOST_TH_RX_3V3 Q1 -2 A01X+057785Y-047491X0581Y0236R270S2
|
||||||
|
327/HOST_TH_RX_5V Q1 -3 A01X+057411Y-046753X0581Y0236R270S2
|
||||||
|
327+5V C3 -1 A01X+058189Y-043888X0354Y0374R090S2
|
||||||
|
327GND C3 -2 A01X+058189Y-044498X0354Y0374R090S2
|
||||||
|
327+3V3 R12 -1 A01X+063484Y-048189X0315Y0374R000S2
|
||||||
|
327HOST_HP_RX_3V3 R12 -2 A01X+064134Y-048189X0315Y0374R000S2
|
||||||
|
327/HP_TX U5 -1 A01X+063878Y-044039X0615Y0140R090S2
|
||||||
|
327GND U5 -2 A01X+063622Y-044039X0615Y0140R090S2
|
||||||
|
327GND U5 -3 A01X+063366Y-044039X0615Y0140R090S2
|
||||||
|
327GND U5 -4 A01X+063110Y-044039X0615Y0140R090S2
|
||||||
|
327{INPUT_SEL_5V} U5 -5 A01X+063110Y-045374X0615Y0140R090S2
|
||||||
|
327/TH_RX U5 -6 A01X+063366Y-045374X0615Y0140R090S2
|
||||||
|
327/HOST_HP_RX_5V U5 -7 A01X+063622Y-045374X0615Y0140R090S2
|
||||||
|
327+5V U5 -8 A01X+063878Y-045374X0615Y0140R090S2
|
||||||
|
327+3V3 Q4 -1 A01X+063435Y-047495X0581Y0236R270S2
|
||||||
|
327HOST_HP_RX_3V3 Q4 -2 A01X+064183Y-047495X0581Y0236R270S2
|
||||||
|
327/HOST_HP_RX_5V Q4 -3 A01X+063809Y-046757X0581Y0236R270S2
|
||||||
|
327+3V3 R10 -1 A01X+059185Y-048189X0315Y0374R000S2
|
||||||
|
327HOST_TH_TX_3V3 R10 -2 A01X+059834Y-048189X0315Y0374R000S2
|
||||||
|
317GND H1 -1 D1063PA00X+063171Y-036890X2126Y0000R000S0
|
||||||
|
327NET-(R1-PAD1) R1 -1 A01X+062830Y-040644X0315Y0374R090S2
|
||||||
|
327GND R1 -2 A01X+062830Y-041294X0315Y0374R090S2
|
||||||
|
327NET-(R15-PAD1) R15 -1 A01X+067687Y-046833X0315Y0374R270S2
|
||||||
|
327GND R15 -2 A01X+067687Y-046183X0315Y0374R270S2
|
||||||
|
327+3V3 C7 -1 A01X+069163Y-043486X0453Y0709R270S2
|
||||||
|
327GND C7 -2 A01X+069163Y-042325X0453Y0709R270S2
|
||||||
|
327+5V U1 -P$1 A01X+063306Y-039335X0217Y0335R000S2
|
||||||
|
327+5V U1 -P$2 A01X+062968Y-039335X0217Y0335R000S2
|
||||||
|
327NET-(R2-PAD1) U1 -P$3 A01X+063306Y-039906X0217Y0335R000S2
|
||||||
|
327NET-(R1-PAD1) U1 -P$4 A01X+062968Y-039906X0217Y0335R000S2
|
||||||
|
327+3V3 R3 -1 A01X+069911Y-043553X0315Y0374R270S2
|
||||||
|
327NET-(J5-PIN_2) R3 -2 A01X+069911Y-042904X0315Y0374R270S2
|
||||||
|
327+5V C5 -1 A01X+062441Y-043888X0354Y0374R090S2
|
||||||
|
327GND C5 -2 A01X+062441Y-044498X0354Y0374R090S2
|
||||||
|
317+12V J3 -1 D0394PA00X+065945Y-040472X0669Y0669R180S0
|
||||||
|
317GND J3 -2 D0394PA00X+065945Y-039472X0669Y0669R180S0
|
||||||
|
317+5V J3 -3 D0394PA00X+065945Y-038472X0669Y0669R180S0
|
||||||
|
317/HP_TX J3 -4 D0394PA00X+065945Y-037472X0669Y0669R180S0
|
||||||
|
317/HP_RX J3 -5 D0394PA00X+065945Y-036472X0669Y0669R180S0
|
||||||
|
327+3V3 R11 -1 A01X+061358Y-048189X0315Y0374R000S2
|
||||||
|
327HOST_HP_TX_3V3 R11 -2 A01X+062008Y-048189X0315Y0374R000S2
|
||||||
|
317GND H2 -1 D1063PA00X+056693Y-050787X2126Y0000R000S0
|
||||||
|
327+5V R8 -1 A01X+058573Y-047278X0315Y0374R270S2
|
||||||
|
327/HOST_TH_TX_5V R8 -2 A01X+058573Y-046628X0315Y0374R270S2
|
||||||
|
327+5V R6 -1 A01X+062844Y-047274X0315Y0374R270S2
|
||||||
|
327/HOST_HP_RX_5V R6 -2 A01X+062844Y-046624X0315Y0374R270S2
|
||||||
|
327+5V C2 -1 A01X+056083Y-043888X0354Y0374R090S2
|
||||||
|
327GND C2 -2 A01X+056083Y-044498X0354Y0374R090S2
|
||||||
|
317+12V J1 -1 D0280PA00X+058193Y-036693X0480Y0000R090S0
|
||||||
|
317GND J1 -2 D0280PA00X+058193Y-037480X0480Y0000R090S0
|
||||||
|
317+5V J1 -3 D0280PA00X+058193Y-038268X0480Y0000R090S0
|
||||||
|
317/TH_RX J1 -4 D0280PA00X+058193Y-039055X0480Y0000R090S0
|
||||||
|
317/TH_TX J1 -5 D0280PA00X+058193Y-039843X0480Y0000R090S0
|
||||||
|
327NET-(R14-PAD1) R14 -1 A01X+067096Y-046833X0315Y0374R270S2
|
||||||
|
327~{HOST_ACTIVE} R14 -2 A01X+067096Y-046183X0315Y0374R270S2
|
||||||
|
317GND H3 -1 D1063PA00X+069685Y-050787X2126Y0000R000S0
|
||||||
|
327/TH_TX U2 -1 A01X+057490Y-044039X0615Y0140R090S2
|
||||||
|
327{INPUT_SEL_5V} U2 -2 A01X+057234Y-044039X0615Y0140R090S2
|
||||||
|
327GND U2 -3 A01X+056978Y-044039X0615Y0140R090S2
|
||||||
|
327GND U2 -4 A01X+056722Y-044039X0615Y0140R090S2
|
||||||
|
327{INPUT_SEL_5V} U2 -5 A01X+056722Y-045374X0615Y0140R090S2
|
||||||
|
327GND U2 -6 A01X+056978Y-045374X0615Y0140R090S2
|
||||||
|
327/HOST_TH_RX_5V U2 -7 A01X+057234Y-045374X0615Y0140R090S2
|
||||||
|
327+5V U2 -8 A01X+057490Y-045374X0615Y0140R090S2
|
||||||
|
327+3V3 U7 -P$1 A01X+067232Y-047961X0217Y0335R180S2
|
||||||
|
327+3V3 U7 -P$2 A01X+067571Y-047961X0217Y0335R180S2
|
||||||
|
327NET-(R14-PAD1) U7 -P$3 A01X+067232Y-047390X0217Y0335R180S2
|
||||||
|
327NET-(R15-PAD1) U7 -P$4 A01X+067571Y-047390X0217Y0335R180S2
|
||||||
|
327+5V R7 -1 A01X+064941Y-047274X0315Y0374R270S2
|
||||||
|
327{INPUT_SEL_5V} R7 -2 A01X+064941Y-046624X0315Y0374R270S2
|
||||||
|
327+3V3 R13 -1 A01X+065600Y-048189X0315Y0374R000S2
|
||||||
|
327INPUT_SEL_3V3} R13 -2 A01X+066250Y-048189X0315Y0374R000S2
|
||||||
|
327/TH_RX U3 -1 A01X+059619Y-044039X0615Y0140R090S2
|
||||||
|
327{INPUT_SEL_5V} U3 -2 A01X+059364Y-044039X0615Y0140R090S2
|
||||||
|
327GND U3 -3 A01X+059108Y-044039X0615Y0140R090S2
|
||||||
|
327GND U3 -4 A01X+058852Y-044039X0615Y0140R090S2
|
||||||
|
327{INPUT_SEL_5V} U3 -5 A01X+058852Y-045374X0615Y0140R090S2
|
||||||
|
327GND U3 -6 A01X+059108Y-045374X0615Y0140R090S2
|
||||||
|
327/HOST_TH_TX_5V U3 -7 A01X+059364Y-045374X0615Y0140R090S2
|
||||||
|
327+5V U3 -8 A01X+059619Y-045374X0615Y0140R090S2
|
||||||
|
999
|
||||||
38
production/positions.csv
Normal file
38
production/positions.csv
Normal file
|
|
@ -0,0 +1,38 @@
|
||||||
|
Designator,Mid X,Mid Y,Rotation,Layer
|
||||||
|
C1,177.575,-106.825,90.0,top
|
||||||
|
C2,142.45,-112.25,270.0,top
|
||||||
|
C3,147.8,-112.25,270.0,top
|
||||||
|
C4,153.2,-112.25,270.0,top
|
||||||
|
C5,158.6,-112.25,270.0,top
|
||||||
|
C6,173.75,-109.8,90.0,top
|
||||||
|
C7,175.675,-108.98,90.0,top
|
||||||
|
J1,145.454699,-99.486,270.0,top
|
||||||
|
J4,175.454699,-99.486,90.0,top
|
||||||
|
J6,160.54,-128.77,180.0,top
|
||||||
|
Q1,145.825,-119.69,270.0,top
|
||||||
|
Q2,151.241666,-119.7,270.0,top
|
||||||
|
Q3,156.658332,-119.7,270.0,top
|
||||||
|
Q4,162.075,-119.7,270.0,top
|
||||||
|
Q5,167.425,-119.7,270.0,top
|
||||||
|
R1,159.5885,-104.0615,270.0,top
|
||||||
|
R10,151.154166,-122.4,0.0,top
|
||||||
|
R11,156.675,-122.4,0.0,top
|
||||||
|
R12,162.075,-122.4,0.0,top
|
||||||
|
R13,167.45,-122.4,0.0,top
|
||||||
|
R14,170.425,-118.13,90.0,top
|
||||||
|
R15,171.925,-118.13,90.0,top
|
||||||
|
R2,161.1885,-104.0615,270.0,top
|
||||||
|
R3,177.575,-109.8,90.0,top
|
||||||
|
R4,143.325,-119.25,90.0,top
|
||||||
|
R5,154.225,-119.25,90.0,top
|
||||||
|
R6,159.625,-119.25,90.0,top
|
||||||
|
R7,164.95,-119.25,90.0,top
|
||||||
|
R8,148.775,-119.26,90.0,top
|
||||||
|
R9,145.7375,-122.4,0.0,top
|
||||||
|
U1,160.368199,-100.6365,90.0,top
|
||||||
|
U2,145.049999,-113.55455,90.0,top
|
||||||
|
U3,150.458332,-113.55455,90.0,top
|
||||||
|
U4,155.866665,-113.55455,90.0,top
|
||||||
|
U5,161.275,-113.55455,90.0,top
|
||||||
|
U6,168.5389,-112.65,90.0,top
|
||||||
|
U7,171.2,-121.095,270.0,top
|
||||||
|
8
sym-lib-table
Normal file
8
sym-lib-table
Normal file
|
|
@ -0,0 +1,8 @@
|
||||||
|
(sym_lib_table
|
||||||
|
(version 7)
|
||||||
|
(lib (name "MSP430FR2000IRLLR")(type "KiCad")(uri "${KIPRJMOD}/libraries/MSP430FR2000IRLLR.kicad_sym")(options "")(descr ""))
|
||||||
|
(lib (name "MSP430FR2000IPW16")(type "KiCad")(uri "${KIPRJMOD}/libraries/MSP430FR2000IPW16.kicad_sym")(options "")(descr ""))
|
||||||
|
(lib (name "S05B-PASK-2")(type "KiCad")(uri "${KIPRJMOD}/libraries/S05B-PASK-2.kicad_sym")(options "")(descr ""))
|
||||||
|
(lib (name "SN74LVC2G53DCT3")(type "KiCad")(uri "${KIPRJMOD}/libraries/SN74LVC2G53DCT3.kicad_sym")(options "")(descr ""))
|
||||||
|
(lib (name "LTST-C195KGJRKT")(type "KiCad")(uri "${KIPRJMOD}/libraries/LTST-C195KGJRKT.kicad_sym")(options "")(descr ""))
|
||||||
|
)
|
||||||
Loading…
Add table
Add a link
Reference in a new issue